cystech electronics corp. spec. no. : c659j3 issued date : 2008.06.25 revised date : page no. : 1/6 BTD6055J3 cystek product specification low vcesat npn epitaxial planar transistor BTD6055J3 features ? low v ce (sat) ? low r ce(sat) , r ce(sat) =50 m (typically) at i c =5a ? low operating collector voltage ? excellent current gain characteristics at very low v ce ? suitable for low dropout voltage application ? pb-free package symbol outline BTD6055J3 to-252 b base c collector b c e e emitter absolute maximum ratings (ta=25 c) parameter symbol limits unit collector-base voltage v cbo 15 v collector-emitter voltage v ceo 10 v emitter-base voltage v ebo 7 v collector current (dc) i c 6 collector current (pulse) i cp 9 (note 1) a power dissipation @ t a =25 p d 1 (note 2) power dissipation @ t c =25 p d 15 w thermal resistance, junction to ambient r ja 71.4 (note 2) c/w thermal resistance, junction to case r jc 6.25 c/w junction temperature tj 150 c storage temperature tstg -55~+150 c note : 1. single pulse , pw Q 380 s,duty Q 2%. 2. when mounted on a pcb with the minimum pad size.
cystech electronics corp. spec. no. : c659j3 issued date : 2008.06.25 revised date : page no. : 2/6 BTD6055J3 cystek product specification characteristics (ta=25 c) symbol min. typ. max. unit test conditions bv ceo 10 - - v i c =1ma, i b =0 i cbo - - 100 na v cb =12v, i e =0 i ebo - - 100 na v eb =7v, i c =0 *v ce(sat) - - 0.2 v i c =3a, i b =20ma *v ce(sat) - - 0.35 v i c =5a, i b =20ma *v be(sat) - - 1.2 v i c =3a, i b =60ma *v be(on) - - 1.2 v v ce =0.3v, i c =3a *h fe 450 - - - v ce =0.3v, i c =500ma *h fe 400 - - - v ce =0.3v, i c =1a *h fe 250 - - - v ce =0.3v, i c =5a f t 100 - - mhz v ce =6v, i c =500ma, f=20mhz cob - - 50 pf v cb =10v, f=1mhz *pulse test : pulse width 380 s, duty cycle 2% ordering information device package shipping marking BTD6055J3 to-252 (pb-free) 2500 pcs / tape & reel d6055
cystech electronics corp. spec. no. : c659j3 issued date : 2008.06.25 revised date : page no. : 3/6 BTD6055J3 cystek product specification characteristic curves current gain vs collector current 100 1000 10 100 1000 10000 collector current ---ic(ma) current gain---hfe hfe vce=1v vce=0.5 v vce=0.3v saturation voltage vs collector current 1 10 100 1000 10 100 1000 10000 collector current ---ic(ma) saturation voltage-(mv) vcesat ic=20ib ic=50ib saturation voltage vs collector current 100 1000 10000 10 100 1000 10000 collector current--- ic(ma) saturation voltage-(mv) vbesat@ic=50ib power derating curve 0 0.2 0.4 0.6 0.8 1 1.2 0 25 50 75 100 125 150 175 200 ambient temperature---ta() power dissipation---pd(w) power derating curve 0 2 4 6 8 10 12 14 16 0 25 50 75 100 125 150 175 200 case temperature---tc() power dissipation---pd(w)
cystech electronics corp. spec. no. : c659j3 issued date : 2008.06.25 revised date : page no. : 4/6 BTD6055J3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c659j3 issued date : 2008.06.25 revised date : page no. : 5/6 BTD6055J3 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c659j3 issued date : 2008.06.25 revised date : page no. : 6/6 BTD6055J3 cystek product specification to-252 dimension *: typical marking: b a c e h i j k 3 2 1 d f g l d6055 device name date code style: pin 1.base 2.collector 3.emitter 3-lead to-252 plastic surface mount package cystek package code: j3 inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.0177 0.0217 0.45 0.55 g 0.0866 0.1102 2.20 2.80 b 0.0650 0.0768 1.65 1.95 h - *0.0906 - *2.30 c 0.0354 0.0591 0.90 1.50 i - 0.0354 - 0.90 d 0.0177 0.0236 0.45 0.60 j - 0.0315 - 0.80 e 0.2520 0.2677 6.40 6.80 k 0.2047 0.2165 5.20 5.50 f 0.2125 0.2283 5.40 5.80 l 0.0551 0.0630 1.40 1.60 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: kfc; solder plating ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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